Design and Analysis of Low Power Level Shifter

Level shifters play critical roles in ultra low-voltage circuits and systems. a new low power level shifter (LS) is presented for robust logic voltage shifting from near/sub threshold to above threshold domain. The new circuit combines the multi threshold CMOS technique along with novel topological modifications to guarantee a wide voltage conversion range with limited static power and total energy consumption. Therefore, this paper presents a novel level shifter, of which the operating range is from a deep sub threshold voltage to the standard supply voltage and includes upward and downward level conversion. The proposed level shifter is a hybrid structure comprising a modified Wilson current mirror and generic CMOS logic gates. power is main constraint in a level shifter. Modified level shifter using cascaded current mirror circuit. In addition to the operating range delay, power consumption, and duty cycle of the proposed level shifter